1、芯片型号规格

2、原理图

使用jlink，SWD模式下需要将CLK、TMS、VDD、GND、RESET 五根线都接起来，否则无法下载调试调试

接线图如下：

3、Keil 工具编译下载

3.1 配置如下：

3.2 调试出问题，不建议使用Keil进行调试

原因：Keil仅支持正版Jlink 调试

4、Jlink Flash下载配置

暂时无法在飞书文档外展示此内容

5、Ozone调试配置

6、hardfault 分析

TLE9891_2QTW61 FOC DEMO移植过程中Hardfault问题分析

将elf文件数据解析成asm文件查看汇编数据 ，可用于分析异常寄存器数据

C:\ghs\comp_202314\gdump.exe -ytext -ysec app.elf > app.asm

=======================================================
Exception No:[5] BusFault Occurred!
The Exception info is:
Current Exception EXC_RETURN: 0x0
xPSR: 0x100022B
PC: 0x1200D9CE
LR: 0x1200B3DF
R0: 0x180018F8
R1: 0x18003F48
R2: 0xC
R3: 0x1A5
R4: 0x18003F48
R5: 0x1
R6: 0x1A5
R7: 0x18007EA0
R8: 0x0
R9: 0x0
R10: 0x0
R11: 0x0
R12: 0x1800221C
SP : 0x180029A0
Enter Exception from Undefined Mode!

BusFault Status Reg: BFSR = 0x8200
=======================================================
 

7、can波特率

波特率计算可以根据公式推导：

/* bit time =Tsync+Tseg1+Tseg2 =(1+15+4)*tq =20*(7+1)/80MHZ= 20*100ns  baud rate =1/bittime =500 kHz*/

/* sampling point = (Tsync+Tseg1)/(Tsync+Tseg1+Tseg2)=(1+15)/(1+15+4)=80% */

/* fcan=80MHz, tq=100ns, TSEG1=1500ns, TSEG2=400ns */

        CANNODE->CAN_NBTR0.bit.BRP = 0x07;
        CANNODE->CAN_NBTR0.bit.SJW = 0x3;
        CANNODE->CAN_NBTR0.bit.TSEG1 = 0xE;
        CANNODE->CAN_NBTR0.bit.TSEG2 = 0x3;
        CANNODE->CAN_NBTR0.bit.DIV8 = 0;

总线采样是由can控制器自动完成的，

busoff恢复需要128次连续11个隐性位，由can控制器自动清除标识位，但can任然处于关闭状态，需求重新初始化模块

8、can通信问题验证

1、使用Ozone调试器调试程序，上位机监测can通信异常rec计数达到128，调试程序无法进入can发送中断程序。

初步原因：发送报文数据全是FF数据，程序初始化后导致数据发送的异常

处理结果：修改发送数据FF为AA，重新编译后调试，程序正常运行。

最终调查发现是can线路接触不好导致的，重新接线后功能正常。

过段时间又异常了，待查。。。。

重新编译烧写后，使用Ozone可正常调试。

感觉是寄存器数据被擦写了恢复了正常。待验证

2、正常报文，但发送时间卡住：

3、正常报文：

可以解释这个ret接收错误计数问题，因为没有收到ack。

9、can时钟配置

从上图可知can波特率依赖的时钟源来自fa，fa来自CLKINA和CLKINB其中一个。下图是时钟AB选择配置，如下：

体配置代码如下：

void MultiCAN_init(void)
{
  /* Load global MultiCAN+ registers */
  /* enable CANNODE module */
  CANNODE-> CLC.reg = 0;

  /* configure fractional divider fcan = fa */
  CANNODE->FDR.bit.DM= 0x01;//1:divider mode
  CANNODE->FDR.bit.STEP = 0x3FF;// 0x3ff = 1023  when DM=1,fcan = fa*1/(1024-1023)=fa

  /* select clock for fa = CLKINB (from PLL1)  */
  /* CLKSEL =2 */
  CANNODE->MCR.bit.CLKSEL = 0x02;
}

10、can receive input select

11、config compare

12、中断号顺序

12、Uart

13、memory

14、CSA

15、ADC 采样

SDADC：

CSA：

16、ADC 异常问题分析：

1、VDDEXT 采样数据异常，PMU修改Enable VDDEXT

2、NTC温度采样异常

ADC1_startSequence 和ADC1_startSequence 同时采样 导致异常

17、资源使用情况

17、can控制器操作模式

18、OS 系统时钟配置

一类中断由OS接管生成的代码，优先级由OS进行配置，采样systick作为中断源

配置系统时钟为58MHz,

配置系统时钟装载值58000，产生1ms中断

cpu_clk配置：

Idle任务10ms周期调度

19、OS ISR配置

中断优先级值越小，优先级越大

/*
 *   ---------------------------------------------------------------------------
 *   Copyright (c) 2023-present, Inc. All rights reserved.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 *   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
 *   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 *   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 *   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 *   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 *   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 *   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 *   POSSIBILITY OF SUCH DAMAGE.
 *
 *   ---------------------------------------------------------------------------
 */
/*-----------------------------------------------------------------------------
 * File Name        : Os_Hal_Vec.S
 * Generated by     : OS V01
 * Date             : 2025-11-28 13:48:39
 * Project          : app
 * Soc              : tle9891
 * Specification(S) : AUTOSAR Classic Platform R21-11
 *-----------------------------------------------------------------------------*/



#define _ASMLANGUAGE
.global Os_IsrRun
.global _tx_thread_system_state

#include "tx_isr_entry.inc"

.global __VECTOR_TABLE              /* Vector Table */
.global __STACK_TOP                 /* Top of Stack for Initial Stack Pointer */
.global Reset_Handler               /* Reset Handler */
.global __tx_NMIHandler             /* NMI Handler */
.global __tx_HardFaultHandler       /* Hard Fault Handler */
.global __tx_MemManageFaultHandler  /* Reserved */
.global __tx_BusFaultHandler        /* Bus Fault Handler */
.global __tx_UsageFaultHandler      /* Usage Fault Handler */
.global __tx_SVCallHandler          /* SVCall Handler */
.global __tx_DBGHandler             /* Debug Monitor Handler */
.global __tx_PendSVHandler          /* PendSV Handler */
.global _vectors                    /* Vector Table */

    .text
    .align 4

.global OsCounterCfg_System_Tick_Isr
  ISR_COUNTER_ENTRY_TYPE2 System_Tick_Isr
.global OsIsrCfg_Can_Error_Isr
  ISR_ENTRY_TYPE2 Can_Error_Isr
.global OsIsrCfg_Can_Receive_Isr
  ISR_ENTRY_TYPE2 Can_Receive_Isr
.global OsIsrCfg_Can_Transmit_Isr
  ISR_ENTRY_TYPE2 Can_Transmit_Isr
.global OsIsrCfg_uart_receive_Isr
  ISR_ENTRY_TYPE2 uart_receive_Isr
.global OsIsrCfg_Adc10_Isr
  ISR_ENTRY_TYPE1 Adc10_Isr
.global OsIsrCfg_Adc11_Isr
  ISR_ENTRY_TYPE1 Adc11_Isr
.global OsIsrCfg_Adc12_Isr
  ISR_ENTRY_TYPE1 Adc12_Isr
.global OsIsrCfg_Adc13_Isr
  ISR_ENTRY_TYPE1 Adc13_Isr
.global OsIsrCfg_Adc20_Isr
  ISR_ENTRY_TYPE2 Adc20_Isr
.global OsIsrCfg_Adc21_Isr
  ISR_ENTRY_TYPE2 Adc21_Isr
.global OsIsrCfg_GPT12_T3_Isr
  ISR_ENTRY_TYPE2 GPT12_T3_Isr


.section  ".intc_vector","ax"
.align 4
.thumb

__VECTOR_TABLE:
_vectors:
    .word __STACK_TOP               /* reserved 0 */
    .word Reset_Handler + 1         /* 1 Exception number */
    .word __tx_NMIHandler           /* 2 */
    .word __tx_HardFaultHandler     /* 3 */
    .word __tx_MemManageFaultHandler/* 4 */
    .word __tx_BusFaultHandler      /* 5 */
    .word __tx_UsageFaultHandler    /* 6 */
    .word 0x00                      /* reserved 7 */
    .word 0x00                      /* reserved 8 */
    .word 0x00                      /* reserved 9 */
    .word 0x00                      /* reserved 10 */
    .word __tx_SVCallHandler + 1    /* 11 */
    .word __tx_DBGHandler           /* 12 */
    .word 0x00                      /* reserved 13 */
    .word __tx_PendSVHandler        /* 14 */


    .word System_Tick_IsrEntry                  /* System_Tick_Isr, CATEGORY_2, 15 */
    .word Os_IsrUndefinedHandler /* reserved 16 */
    .word Os_IsrUndefinedHandler /* reserved 17 */
    .word Os_IsrUndefinedHandler /* reserved 18 */
    .word Os_IsrUndefinedHandler /* reserved 19 */
    .word Os_IsrUndefinedHandler /* reserved 20 */
    .word Os_IsrUndefinedHandler /* reserved 21 */
    .word Os_IsrUndefinedHandler /* reserved 22 */
    .word GPT12_T3_IsrEntry                  /* GPT12_T3_Isr, CATEGORY_2, 23 */
    .word Os_IsrUndefinedHandler /* reserved 24 */
    .word Os_IsrUndefinedHandler /* reserved 25 */
    .word Adc20_IsrEntry                  /* Adc20_Isr, CATEGORY_2, 26 */
    .word Adc21_IsrEntry                  /* Adc21_Isr, CATEGORY_2, 27 */
    .word Os_IsrUndefinedHandler /* reserved 28 */
    .word Os_IsrUndefinedHandler /* reserved 29 */
    .word Adc10_IsrEntry                  /* Adc10_Isr, CATEGORY_1, 30 */
    .word Adc11_IsrEntry                  /* Adc11_Isr, CATEGORY_1, 31 */
    .word Adc12_IsrEntry                  /* Adc12_Isr, CATEGORY_1, 32 */
    .word Adc13_IsrEntry                  /* Adc13_Isr, CATEGORY_1, 33 */
    .word Os_IsrUndefinedHandler /* reserved 34 */
    .word Os_IsrUndefinedHandler /* reserved 35 */
    .word Os_IsrUndefinedHandler /* reserved 36 */
    .word Os_IsrUndefinedHandler /* reserved 37 */
    .word uart_receive_IsrEntry                  /* uart_receive_Isr, CATEGORY_2, 38 */
    .word Os_IsrUndefinedHandler /* reserved 39 */
    .word Os_IsrUndefinedHandler /* reserved 40 */
    .word Os_IsrUndefinedHandler /* reserved 41 */
    .word Can_Transmit_IsrEntry                  /* Can_Transmit_Isr, CATEGORY_2, 42 */
    .word Can_Receive_IsrEntry                  /* Can_Receive_Isr, CATEGORY_2, 43 */
    .word Can_Error_IsrEntry                  /* Can_Error_Isr, CATEGORY_2, 44 */
    .word Os_IsrUndefinedHandler /* reserved 45 */
    .word Os_IsrUndefinedHandler /* reserved 46 */
    .word Os_IsrUndefinedHandler /* reserved 47 */

.size __VECTOR_TABLE, . - __VECTOR_TABLE

20、寄存器访问类型